
2011-2012 Microchip Technology Inc.
Preliminary
DS41579C-page 289
PIC16(L)F1782/3
FIGURE 26-19:
I2C SLAVE, 7-BIT ADDRESS, TRANSMISSION (AHEN = 1)
R
ece
iv
ing
A
d
dr
ess
A
ut
oma
tic
T
ran
smi
tti
ng
D
at
a
A
ut
oma
tic
T
ra
nsm
itti
n
g
D
a
ta
A7
A6
A5
A4
A3
A2
A1
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
SD
A
SCL
SSPI
F
BF
ACKDT
ACKS
TA
T
CKP
R/W
D/
A
R
ece
iv
ed
ad
dre
ss
is
r
ead
fr
om
S
P
B
U
F
BF
is
au
to
m
a
tica
lly
cl
ea
red
after
8th
fa
lli
n
g
e
dge
of
S
C
L
Dat
a
to
tra
nsm
itis
lo
a
de
d
in
to
SSPB
U
F
C
lear
ed
by
sof
tw
are
S
lave
cl
ea
rs
ACKDT
t
oACK
ad
dre
ss
M
a
ster
’s
A
C
K
re
sp
on
se
is
copie
d
to
SS
PST
A
T
C
K
P
n
ot
c
lear
ed
after
not
A
C
K
S
e
tby
softw
ar
e,
re
le
as
es
S
C
L
A
C
K
T
IM
is
cl
ear
ed
o
n9t
hr
isi
ng
edg
eo
fS
C
L
ACKT
IM
is
s
et
o
n8
th
f
allin
g
ed
ge
o
fS
C
L
Wh
e
nAHEN
=
1
;
C
K
P
is
cl
ear
ed
by
h
ar
dw
ar
e
after
re
ceivin
gm
atch
ing
a
ddr
ess.
Wh
e
nR/
W
=
1
;
CKP
is
a
lw
ay
s
cl
ea
red
after
A
C
K
S
P
M
ast
er
send
s
S
top
cond
iti
on
ACK
R/W
=
1
Ma
ster
re
leas
es
S
D
A
to
sl
ave
for
A
C
K
seq
uen
ce
ACK
AC
K
ACKT
IM